ISL97672A
If R 1 and R 2 are chosen such that the OVP level is set at 40V,
then V OUT is allowed to operate between 25.6V and 40V. If the
V OUT requirement is changed to an application of six LEDs of 21V,
then the OVP level must be reduced. Users should follow the
V OUT = (64% ~100%) OVP level requirement; otherwise, the
headroom control will be disturbed such that the channel voltage
can be much higher than expected. This can sometimes prevent
the driver from operating properly.
The resistances should be large, to minimize power loss. For
example, a 1M Ω R UPPER and a 30k Ω R LOWER sets OVP to 41.9V.
Large OVP resistors also allow C OUT to discharge slowly during the
PWM Off time. Parallel capacitors should also be placed across
the OVP resistors such that R UPPER /R LOWER = C LOWER /C UPPER .
Using a C UPPER value of 30pF is recommended. These capacitors
reduce the AC impedance of the OVP node, which is important
when using high-value resistors. For example, if R UPPER /R LOWER
= 33/1, then C UPPER /C LOWER = 1/33 with C UPPER = 100pF and
C LOWER = 3.3nF
Undervoltage Lock-out
If the input voltage falls below the UVLO level, the device stops
switching and is reset. Operation restarts only when V IN returns
to the normal operating range.
Input Overcurrent Protection
During a normal switching operation, the current through the
internal boost power FET is monitored. If the current exceeds the
current limit, the internal switch is turned off. Monitoring occurs
on a cycle-by-cycle basis in a self-protecting way. Additionally, the
ISL97672A monitors the voltage at the LX and OVP pins. At start-
up, the LX pins inject a fixed current into the output capacitor.
The device does not start unless the voltage at LX exceeds 1.2V.
The OVP pin is also monitored such that if it rises above and
subsequently falls below 20% of the target OVP level, the input
protection FET is also switched off.
Over-Temperature Protection (OTP)
The ISL97672A includes two over-temperature thresholds. The
lower threshold is set to +130°C. When this threshold is reached,
any channel that is outputting current at a level significantly below
the regulation target is treated as “open circuit” and is disabled
after a time-out period. This time-out period is 800μs when it is
above the lower threshold. The lower threshold isolates and
disables bad channels before they cause enough power
dissipation (as a result of other channels having large voltages
across them) to hit the upper temperature threshold.
The upper threshold is set to +150°C. Each time this threshold is
reached, the boost stops switching, and the output current
sources switch off. Once the device has cooled to approximately
+100°C, the device restarts, with the DC LED current level
reduced to 75% of the initial setting. If dissipation persists,
subsequent hitting of the limit causes identical behavior, with the
current reduced in steps to 50% and finally 25%. Unless disabled
via the EN pin, the device stays in an active state throughout.
For complete details of fault protection conditions, see Figure 20
and Table 1.
VIN
LX
VOUT
/FLAG
DRIVER
IMAX
ILIMIT
FAULT
LOGIC
O/P
SHORT
FET
DRIVER
LX
OVP
VSC
CH0
FAULT FLAG
CH5
THRM
SHDN
OTP
REF
T2
TEMP
SENSOR
T1
FAULT
DETECT
VSET
Q0 VSET
Q5
LOGIC
PWM
PWM/OC0/SC0
PWM/OC5/SC5
GENERATOR
FIGURE 20. SIMPLIFIED FAULT PROTECTIONS
11
FN7710.3
November 22, 2013
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